J.D.Bridge - Professinal supplier and distributor for High-tech products
Kimtigo agent
REG Memory VLP
- Design in accordance with the JEDEC standard;
- 18.75mm-high VLP;
- Built-in ECC and Parity functions;
- Synchronous data signal and consistent driving force in high-speed multi-load environment;
- High-standard PCB design with 8-10 layers of boards;
- 30 μ industrial gold-finger process;
- Server-class original DRAM chips selected.
Specification parameters
Model | Bandwidth | Capacity | Voltage | Working temperature | CL | Pin | Gold finger | ||||
Low temperature | High temperature | ||||||||||
-40°C | -20°C | 0°C | 85°C | 95°C | |||||||
DDR4-2666 REG UDIMM VLP | PC4-21300 | 4GB-8GB | 1.2V | * | * | * | * | CL19 | 288-pin | 30μ" | |
DDR4-2133 REG UDIMM VLP | PC4-17000 | 4GB-8GB | 1.2V | * | * | * | * | * | CL15 | 288-pin | 30μ" |
*Indicates optional |